2017-08-21: VC5, DSI

This week I finished fixing regressions from the VC5 QPU instruction scheduler, and polished the vc5 series up so I could post it for review in Mesa. I landed a few initial bits that wouldn’t affect anyone else.

I also took another look at my DSI series. I had previously tried to work around the boot time dependency circle by letting the DSI device be created before the DSI host showed up. That proved to be fragile as well (in particular it would have had issues if the host had to -EPROBE_DEFER for some other reason), so I went back and made VC4 advertise a DSI host before any of the rest of the DSI encoder was ready. This proved to be not very hard, and I’m hoping once again that this is the final version of the series.

Other bits this week:

  • Fixed tile layout for 64bpp textures on VC5.
  • Fixed DSI transactions sleeping in the IRQ handler.
  • Did some investigation of HW behavior for upstreaming Pi3 BT
  • Sent a second set of PRs for bcm2835 features in 4.14
  • Landed NEON build support for ARMv6 and Jonas’s ARM64 port
  • Landed HDMI EDID leak fix
  • Landed X Server scissoring optimizations for VC4.
  • Fixed and resubmitted GL_OES_required_internalformat support (part of vc4 GLES2 DEQP fixes)