I spent the last week mostly working on VC5 GL features and bugfixes again.
- Fixed a crash with ARB fragment programs
- Fixed sRGBA8 ETC2 support.
- Fixed piglit early-z on hardware.
- Fixed lod clamping in the presence of BASE_LEVEL.
- Added support for anisotropic filtering
- Fixed mipmap filtering setup in the HW.
- Fixed padding of small miplevels of UIF textures
- Fixed GLSL ES 3.0 minimum-maximum values.
- Fixed GL 2.1 min-max values.
- Fixed stencil state (and moved it to CSO to reduce draw overhead).
- Reduced emission of unused GL state.
- Improved CL debug output.
- Fixed alignment of texture sampler state.
- Fixed depth (without stencil) render targets.
However, most of my time was actually spent on trying to track down my remaining GPU hangs. Not many tests hang, but fbo-generatemipmaps is one, and it’s a big component of piglit’s coverage. So far, I’ve definitely figured out that the hanging RCL has run to completion without error, but without the bit in the interrupt status being set (which is supposed to be set by the final command of the RCL). I tracked down that I had my DT wrong and was treating VC5 as edge-triggered rather than level, but that doesn’t seem to have helped.
On the VC4 front, I’ve been talking to someone trying to rig up other DSI panels to the RPi. It got me looking at my implementation again, and I finally found why my DSI transactions weren’t working: I was emitting the wrong type of transactions for the bridge! Switching from a DCS write to a generic write, the panel comes up fine and the flickering is gone.